The present invention relates broadly to semiconductor devices, and in particular to a two carrier dual injector semiconductor apparatus.
Non-volatile semiconductor memory devices which are particularly useful for electrically alterable read-only memories have been constructed in various structural configurations. One example of which is a metal-insulator-semiconductor (MIS) structure that is formed by stepping or grading the energy band gap near the metal gate electrode of the device. In a memory device using the MIS structure, either electrons or holes may be injected into the insulating layer with less applied voltage.
Other types of non-volatile memory structures and variations thereof include the floating-gate avalanche-injection metal-silicon dioxide-semiconductor (FAMOS) and metal-silicon nitride-silicon dioxide-semiconductor (MNOS) structures. The FAMOS memory structures are written into by hot electron injection from a silicon (Si) junction which is pulsed to the avalanche breakdown point. The memory structures may be read or erased rather slowly by using ultra-violet (UV) light to optically discharge the trapped electrons on the floating poly-Si storage layer in the device. Thus, it may be seen that FAMOS memory structures have these problems which limit the number of cycles that they can be operated through.
Metal-silicon nitride-silicon dioxide-semiconductor (MNOS) structures have also been utilized to provide non-volatile semiconductor memory devices. However, there is a problem with MNOS memory devices in that they suffer from wear-out, read perturb, and poor information retention. The wear-out mechanism occurs during the operation of the MNOS memory device when the nitride-oxide layer is charged and discharged a large number of times. The present apparatus provides a memory device wherein complete charging and discharging may be accomplished at will without being subject to wear-out.